Silicon Labs /Series0 /EZR32WG /EZR32WG330F128R63 /USB /HPRT

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Interpret as HPRT

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PRTCONNSTS)PRTCONNSTS 0 (PRTCONNDET)PRTCONNDET 0 (PRTENA)PRTENA 0 (PRTENCHNG)PRTENCHNG 0 (PRTOVRCURRACT)PRTOVRCURRACT 0 (PRTOVRCURRCHNG)PRTOVRCURRCHNG 0 (PRTRES)PRTRES 0 (PRTSUSP)PRTSUSP 0 (PRTRST)PRTRST 0PRTLNSTS 0 (PRTPWR)PRTPWR 0 (DISABLE)PRTTSTCTL 0 (HS)PRTSPD

PRTSPD=HS, PRTTSTCTL=DISABLE

Description

Host Port Control and Status Register

Fields

PRTCONNSTS

Port Connect Status

PRTCONNDET

Port Connect Detected

PRTENA

Port Enable

PRTENCHNG

Port Enable/Disable Change

PRTOVRCURRACT

Port Overcurrent Active

PRTOVRCURRCHNG

Port Overcurrent Change

PRTRES

Port Resume

PRTSUSP

Port Suspend

PRTRST

Port Reset

PRTLNSTS

Port Line Status

PRTPWR

Port Power

PRTTSTCTL

Port Test Control

0 (DISABLE): Test mode disabled.

1 (J): Test_J mode.

2 (K): Test_K mode.

3 (SE0NAK): Test_SE0_NAK mode.

4 (PACKET): Test_Packet mode.

5 (FORCE): Test_Force_Enable.

PRTSPD

Port Speed

0 (HS): High speed.

1 (FS): Full speed.

2 (LS): Low speed.

Links

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